Cold-cathode field-emission devices (FEDs) are known in the art. Such cold-cathode field-emission devices employ emitter electrodes with geometric discontinuities of small radius of curvature for the purpose of emitting electrons.
The prior art teaches that FEDs are formed by a number of preferred methods. One such method taught by the prior art results in an emitter electrode disposed on the surface of a supporting substrate material, while an alternative method employs selective semiconductor processing to form the emitter electrode directly from the supporting substrate material.
A number of impediments to optimum utilization of FEDs can be associated with these and other prior art methods. One such impediment is that control of limitation of emission is not easily implemented within the FED structure. Additionally, under prior art methods, mono-crystal silicon transistor devices are generally restricted to formation in the substrate material in a structure in which FEDs are also located.
Therefore, a need exists for an FED formation methodology that can easily incorporate an emitter current limitation mechanism and provide for the formation of single-crystal silicon transistors at locations other than in the substrate material.